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  Datasheet File OCR Text:
 May 2001
DUCT UCT E PR O SOL ET ITUTE PROD OB BST at LE SU -5104 Center HA POSSIB upport nical S m/tsc r Te c h rsil.co w.inte t a c t ou Quad, 14MHz, Microprocessor BiMOS-E c on or ww ERSIL 88-INT 1-8 Operational Amplifier with MOSFET Input/Bipolar Output
(R)
CA5470
Features
* High Speed CMOS Input Stage Provides - Very High ZI . . . . . . . . . . . . . . . 5T (5 x 1012) (Typ) - Very Low lI . . . . . . . . . . 0.5pA (Typ) at 5V Operation - Very Low IIO . . . . . . . . . 0.5pA (Typ) at 5V Operation * ESD Protection to 2000V * 3V to 16V Power Supply Operation * Fully Guaranteed Specifications Over Full Military Range * Wide BW (14MHz); High SR (5V/s) at 5V Supply * Wide VlCR Range From -0.5V to 3.7V (Typ) at 5V Supply * Ideally Suited for CMOS and HCMOS Applications
Description
The CA5470 is an operational amplifier that combines the advantages of both high speed CMOS and bipolar transistors on a single monolithic chip. It is constructed in the BiMOS-E process which adds drain-extension implants to 3m polygate CMOS, enhancing both the voltage capability and providing vertical bipolar transistors for broadband analog/digital functions. This process lends itself easily to high speed operational amplifiers, comparators, analog switches and interface peripherals, resulting in twice the speed of the conventional CMOS transistors having similar feature size. BiMOS-E are broadbased bipolar transistors that have high transconductance, gains more constant with current level, stable "precision" base-emitter offset voltages and superior drive capability. Excellent interface with environmental potentials enable use in 5V logic systems and future 3.3V logic systems. Refer to Application Note AN8811. ESD capability exceeds the standard 2000V level. The CA5470 series can operate with single supply voltages from 3V to 16V or 1.5V to 8V. They have guaranteed specifications at both 5V and 7.5V at room temperature as well as over the full -55oC to 125oC military range.
Applications
* Bar Code Readers * Photodiode Amplifiers (IR) * Microprocessor Buffering * Ground Reference Single Supply Amplifiers * Fast Sample and Hold * Timers * Voltage Controlled Oscillators * Voltage Followers * V to l Converters * Peak Detectors * Precision Rectifiers * 5V Logic Systems * 3V Logic Systems
Part Number Information
PART NUMBER (BRAND) CA5470E CA5470M (5470) CA5470M96 (5470) TEMP. RANGE ( oC) -55 to 125 -55 to 125 -55 to 125 PACKAGE 14 Ld PDIP 14 Ld SOIC 14 Ld SOIC Tape and Reel PKG. NO. E14.3 M14.15 M14.15
Pinout
CA5470 (PDIP, SOIC) TOP VIEW
OUTPUT 1 1 NEG. INPUT 1 2 1 4 ++ 14 OUTPUT 4 13 NEG. INPUT 4
POS. INPUT 1 3 V+ 4 POS. INPUT 2 5 NEG. INPUT 2 6 OUTPUT 2 7
12 POS. INPUT 4 11 V-
2
++ 3
-
10 POS. INPUT 3 9 8 NEG. INPUT 3 OUTPUT 3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved 1
File Number
1946.4
CA5470
Absolute Maximum Ratings
DC Supply Voltage (Between V+ And V- Terminals) . . . . . . . . . 16V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) to (V- -0.5V) Input Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA Output Short Circuit Duration (Note 1) . . . . . . . . . . . . . . . . Indefinite
Thermal Information
Thermal Resistance (Typical, Note 1)
JA (oC/W)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Short circuit may be applied to ground or to either supply. 2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Typical Values Intended Only for Design Guidance at V+ = 5V, V- = 0V, TA = 25oC, Unless Otherwise Specified
PARAMETER Input Resistance Input Capacitance Unity Gain Crossover Frequency Slew Rate Transient Response: Rise Time/Fall Time Overshoot Settling Time (To <0.1%, VIN = 4VP-P) Full Power BW, SR = 5V/s tr OS tS FPBW CL = 25pF, RL= 2k (Voltage Follower) AV = 1, VOUT = 3.65VP-P SYMBOL RI CI fT SR VOUT = 3.65VP-P CL = 25pF, RL= 2k (Voltage Follower) f = 1MHz TEST CONDITIONS TYPICAL VALUES 5 3.1 14 5 UNITS T pF MHz V/s
27/25 20 1 436
ns % s kHz
Electrical Specifications TA = 25oC, V+ = 5V, V- = GND
PARAMETER Input Offset Voltage Input Offset Current Input Current Common Mode Input Range Common Mode Rejection Ratio Power Supply Rejection Ratio Positive Output Voltage Swing Negative Output Voltage Swing Total Supply Current Unity Gain Bandwidth Product Slew Rate Output Current Source to opposite supply Sink to opposite supply Open Loop Gain ISOURCE ISlNK AOL 0.5V to 3.5V, RL = 10k 4 1.0 80 5.5 1.2 90 mA mA dB SYMBOL |VIO| |IIO| II VICR CMRR PSRR VOM+ VOMISUPPLY fT SR VICR = 0V to 3.5V V = 2V RL = 2k to GND RL = 2k to GND VOUT = 2.5V, RL = TEST CONDITIONS MIN 3.5 55 60 4 10 4 TYP 6 0.5 0.5 -0.5 to 3.7 70 75 4.4 0.06 6 14 5 MAX 22 50 (Note 3) 50 (Note 3) 0 0.10 7 UNITS mV pA pA V dB dB V V mA MHz V/s
NOTE: 3. This is the lowest value that can be tested reliably. Almost all devices will be <10pA.
2
CA5470
Electrical Specifications
PARAMETER Input Offset Voltage Input Offset Current Input Current Common Mode Input Range Common Mode Rejection Ratio Power Supply Rejection Ratio Positive Output Voltage Swing Negative Output Voltage Swing Total Supply Current Unity Gain Bandwidth Product Slew Rate Output Current Source to opposite supply Sink to opposite supply Open Loop Gain ISOURCE ISlNK AOL 0.5V to 3.5V, RL = 10k 4 0.8 80 5.5 1.2 90 mA mA dB TA = -55oC to 125oC, V+ = 5V, V- = GND SYMBOL |VIO| |IIO| II VICR CMRR PSRR VOM+ VOMISUPPLY fT SR VICR = 0V to 3.5V V = 2V RL = 2k to GND RL = 2k to GND VOUT = 2.5V TEST CONDITIONS MIN 3.5 50 58 3.8 8 3 TYP 6 550 550 -0.5 to 3.7 65 75 4.2 0.08 9 12 5 MAX 25 5500 11000 0 0.11 11 UNITS mV pA pA V dB dB V V mA MHz V/s
Electrical Specifications
PARAMETER Input Offset Voltage Input Offset Current Input Current Common Mode Input Range Common Mode Rejection Ratio Power Supply Rejection Ratio Positive Output Voltage Swing
TA = 25oC, VSUPPLY = 7.5V SYMBOL |VIO| |IIO| II VICR CMRR PSRR VOM+ RL = 2k to GND RL = 10k to GND 6.3 6.4 6.5 6.6 V V VICR = 0V to 13.3V V = 1V TEST CONDITIONS MIN 5.8 60 60 TYP 5 0.5 1 -7.8 to 6.0 70 76 MAX 25 50 (Note 4) 50 (Note 4) -7.5 UNITS mV pA pA V dB dB
Negative Output Voltage Swing
VOMRL = 2k to GND RL = 10k to GND VOUT = GND, R L = 12 4 -2.6 -7.3 10 16 7 -2 -7.1 12 V V mA MHz V/s
Total Supply Current Unity Gain Bandwidth Product Slew Rate Output Current Source to opposite supply Sink to opposite supply Open Loop Gain NOTE:
ISUPPLY fT SR
ISOURCE ISlNK AOL -5V to +5V, RL = 10k
6.2 1 80
6.8 1.4 90
-
mA mA dB
4. This is the lowest value that can be tested reliably. Almost all devices will be <10pA.
3
CA5470
Electrical Specifications
PARAMETER Input Offset Voltage Input Offset Current Input Current Common Mode Input Range Common Mode Rejection Ratio Power Supply Rejection Ratio Positive Output Voltage Swing TA = -55oC to 125oC, VSUPPLY = 7.5V SYMBOL |VIO| |IIO| II VICR CMRR PSRR VOM+ RL = 2k to GND RL = 10k to GND Negative Output Voltage Swing VOMRL = 2k to GND RL = 10k to GND Total Supply Current Unity Gain Bandwidth Product Slew Rate Output Current Source to opposite supply Sink to opposite supply Open Loop Gain ISOURCE ISlNK AOL -5V to +5V, RL = 10k 6.2 1 80 6.8 1.4 90 mA mA dB ISUPPLY fT SR VOUT = GND, R L = 10 3 -2.6 -7.3 12 15 7 -2 -7.1 18 V V mA MHz V/s 4.75 6.1 5.5 6.4 V V VICR = 0V to 3.5V V = 1V TEST CONDITIONS MIN 5.8 58 60 TYP 5 550 1100 -7.8 to 6.0 70 76 MAX 30 5500 11000 -7.5 UNITS mV pA pA V dB dB
Block Diagram (1/4 of CA5470)
V+ TO BIAS CIRCUIT 4 1.8mA/AMP
100A
150A
320A
50A
50A 1.2mA
+INPUT
AV 6dB
OUTPUT
-INPUT
AV
30dB
AV 54dB
2k
2k 11
PMOS DIFFERENTIAL INPUT STAGE
GROUNDED GATE LEVEL SHIFTER
COMPOSITE MILLER GAIN STAGE
OUTPUT STAGE
GND OR - SUPPLY
4
CA5470 Typical Performance Curve
14 12 VOUT (VP-P) 10 8 6 4 2 V+ = 5V, V- = 0V VS = 7.5V
10K
100K
1M
10M
100M
FREQUENCY
FIGURE 1. MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY
Metallization Mask Layout
Dimensions in parentheses are in millimeters and derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch). The layout represents a chip when it is part of the wafer. When the wafer is cut into chips, the cleavage angles are 57o instead of 90o with respect to the face of the chip. Therefore, the isolated chip is actually 7 mils (0.17mm) larger in both dimensions.
97.2 (2.46)
69.7 (1.77)
5


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